Many prior art computer systems are common clocked systems where multiple components within the system are driven by a common clock signal. In such systems components such as processors and cache memories are driven by a common clock signal, which is used to synchronize communication between components. However, as operating frequencies have increased, clock skew caused by distribution of the clock signal within the system has become a limiting factor.
In order to overcome the limitations caused by clock skew in common clocked systems, processors have been designed with source synchronous interfaces that send and receive timing information in the form of strobe signals along with data. These strobe signals are used to drive the components receiving the data. However, in order to provide a functional computer system, other components, such as cache memories must be redesigned to communicate in a source synchronous manner, which increases development time and costs associated with the computer system.
Therefore, what is needed is the ability to allow a source synchronous component to capture data received from a non-source synchronous component and thereby communicate with the non-source synchronous component. The present invention provides such a capability.